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5SGSMD5K2F40I3N 172600 LABs 696 I/O Stratix V GS

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5SGSMD5K2F40I3N 172600 LABs 696 I/O Stratix V GS

Brand Name : Intel / Altera

Model Number : 5SGSMD5K2F40I3N

Certification : Lead free / RoHS Compliant

MOQ : 1 pcs

Price : USD 8000-10000 pcs

Payment Terms : T/T, Western Union, Paypal, Trade Assurance, Credit Card

Supply Ability : 108 pcs

Delivery Time : 3-5 Day

Packaging Details : International Standard Packaging

Category : IC FPGA

Condition : Original 100%,Brand New and Original,New

Series : Stratix V GS

Number of Logic Array Blocks - LABs : 172600

Number of I/Os : 696 I/O

Operating Supply Voltage : 900 mV

Package / Case : FBGA-1517

Data Rate : 14.1 Gb/s

Service : BOM Kitting

Lead time : In Stock,contact us

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5SGSMD5K2F40I3N ALTERA FPGA Chip FBGA-1517 696 I/O Stratix V GS

Product Attribute Attribute Value
Intel
FPGA - Field Programmable Gate Array
Stratix V GS
457000
172600
696 I/O
900 mV
- 40 C
+ 85 C
SMD/SMT
FBGA-1517
Tray
Data Rate: 14.1 Gb/s
Series: Stratix V GS 5SGSD5
Brand: Intel / Altera
Embedded Block RAM - EBR: 5.27 Mbit
Moisture Sensitive: Yes
Number of Transceivers: 36 Transceiver
Product Type: FPGA - Field Programmable Gate Array
Factory Pack Quantity: 21
Subcategory: Programmable Logic ICs
Total Memory: 44.27 Mbit
Tradename: Stratix V FPGA
Part # Aliases: 969604

Stratix V Features Summary• 28-nm TSMC process technology
• Enhanced ALM with four registers
• Improved routing architecture reduces congestion and improves compile times
• M20K: 20-Kbit with hard error correction code (ECC)
• MLAB: 640-bit
• Up to 600 MHz performance
• Natively support signal processing with precision ranging from 9x9 up to 54x54
• New native 27x27 multiply mode
• 64-bit accumulator and cascade for systolic finite impulse responses (FIRs)
• Embedded internal coefficient memory
• Pre-adder/subtractor improves efficiency
• Increased number of outputs allows more independent multipliers
• Fractional mode with third-order delta-sigma modulation
• Integer mode
• Precision clock synthesis, clock delay compensation, and zero delay buffer (ZDB)
• 800-MHz fabric clocking
• Global, quadrant, and peripheral clock networks
• Unused clock networks can be powered down to reduce dynamic power
• Gigabit Ethernet (GbE) and XAUI PCS
• 10G Ethernet PCS
• Serial RapidIO® (SRIO) PCS
• Common Public Radio Interface (CPRI) PCS
• Gigabit Passive Optical Networking (GPON) PCS
• Programmable Power Technology
• Quartus II integrated PowerPlay Power Analysis



5SGSMD5K2F40I3N 172600 LABs 696 I/O Stratix V GS


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5SGSMD5K2F40I3N ALTERA FPGA Chip

      

696 I/O Stratix V GS

      

172600 LABs Stratix V GS

      
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